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mirror of https://github.com/adtools/clib2.git synced 2025-12-08 14:59:05 +00:00

- The data structure alignment (file I/O buffer) is now configurable

at compile time. The default used to be 16 bytes, which is appropriate
  for the 68040/68060 but not for the PowerPC, which uses 32 or 128
  bytes per cache line.


git-svn-id: file:///Users/olsen/Code/migration-svn-zu-git/logical-line-staging/clib2/trunk@14787 87f5fb63-7c3d-0410-a384-fd976d0f7a62
This commit is contained in:
Olaf Barthel
2004-12-26 13:14:47 +00:00
parent ad0880d204
commit e77cc97daf
8 changed files with 34 additions and 39 deletions

View File

@ -1,5 +1,5 @@
/*
* $Id: stdio_setvbuf.c,v 1.1.1.1 2004-07-26 16:31:41 obarthel Exp $
* $Id: stdio_setvbuf.c,v 1.2 2004-12-26 13:14:47 obarthel Exp $
*
* :ts=4
*
@ -120,7 +120,7 @@ setvbuf(FILE *stream,char *buf,int bufmode,size_t size)
if(size > 0 && buf == NULL)
{
/* Allocate a little more memory than necessary. */
new_buffer = malloc(size + 15);
new_buffer = malloc(size + (CACHE_LINE_SIZE-1));
if(new_buffer == NULL)
{
errno = ENOBUFS;
@ -167,7 +167,7 @@ setvbuf(FILE *stream,char *buf,int bufmode,size_t size)
file->iob_CustomBuffer = new_buffer;
/* Align the buffer start address to a cache line boundary. */
new_buffer = (char *)((ULONG)(new_buffer + 15) & ~15UL);
new_buffer = (char *)((ULONG)(new_buffer + (CACHE_LINE_SIZE-1)) & ~(CACHE_LINE_SIZE-1));
}
}